1. Field of the Invention
The present invention relates to a single-chip microcomputer incorporating an OSD (On Screen Display) device having an image display function, and particularly to a single-chip microcomputer which can perform erasing or rewriting operation of a memory device using a CPU separately from image display operation using an OSD device by disconnecting the OSD device from a signal line connecting it with the CPU, and a method of modifying memory contents of the memory device.
2. Description of the Prior Art
When erasing or rewriting memory contents of a memory circuit is carried out in a conventional single-chip microcomputer in which a CPU and memory circuits are formed on a single chip, the CPU erases or rewrites the memory contents of each memory circuit by controlling certain functions of the microcomputer. In case of audio visual (AV) apparatus including a television or liquid crystal display, images including characters are displayed using a microcomputer having an image display function (hereinafter, referred to as OSD function) on a cathode-ray tube (Braun tube) or a display of the liquid crystal display device.
FIG. 3 is a block diagram showing a construction of a conventional single-chip microcomputer including the memory circuits and having the OSD function as mentioned above. In the same drawing, reference numeral 31 designates a CPU for executing commands included in a CPU program, 32 denotes a signal line for connecting BOOT ROM 34, ROM 35, OSDROM 36, and OSD circuit 37 to CPU 31, respectively, via sequencer 33 and propagating signals (address signals, data signals) between CPU 31 and these devices. Signal line 32 is composed of address buses and data buses. Sequencer 33 is connected to CPU 31, ROM 35, and OSDROM 36 via signal line 32 and controls the order of applying voltages for erasing or rewriting to each of memory circuits which construct ROM 35 and OSDROM 36 when CPU 31 erases or rewrites memory contents of these memory devices.
BOOT ROM 34 stores each erasing or rewriting program which is read by CPU 31 selectively or properly to execute erasing or rewriting operation when CPU 31 erases or rewrites memory contents of ROM 35 or OSDROM 36. ROM 35 is a memory circuit which stores a CPU program (program relating to functions to be executed by the microcomputer) to be executed by CPU 31, and is composed of a non-volatile memory, for example, a flash memory whose memory contents are electrically erasable or rewritable. OSDROM 36 is a memory circuit which stores image display data to be used when OSD cirsuit 37 produces display signals, and is composed of a non-volatile memory, for example, a flash memory whose memory contents are electrically erasable or rewritable. OSD circuit 37 produces display signals relating to image information to be displayed on an external display device (not shown) based on commands from CPU 31, and outputs them to the display device. Signal line 38 is connected to OSDROM 36 and OSD circuit 37, and propagates image display data selected based on commands from CPU 31 and signals relating to their address data in OSDROM 36.
Next, operation of the above system is described. CPU 31 reads in succession commands included in a CPU program stored in ROM 35, and executes selectively a process relating to each function of the microcomputer by writing in ROM 35 the data produced through the process or by reading data stored in ROM 35
First, in operation of the image display function, a control section (not shown) in OSD circuit 37 is controlled by command execution by CPU 31 to operate OSD circuit 37.
When address data in OSDROM 36 and display positions on a display of an external display device (not shown) of image display data (information including graphics, character fonts and colors) relating to images (including character information) to be displayed on the external display device are set by CPU 31 via signal line 32, OSD circuit 37 outputs address signals corresponding to the address data to OSDROM 36 via signal line 38. When OSDROM 36 receives the address signals, it extracts image display data corresponding to the address data, and outputs them to OSD circuit 37 via signal line 38. OSD circuit 37 produces display signals relating to images (including character information) to be displayed on the external display device (not shown) using the image display data, and outputs them to the external display device via a signal line (not shown) to display images (including character information) relating to the display signals.
Next, rewriting operation of memory contents of the memory circuits (ROM 35, OSDROM 36) is described.
Since the rewriting operation of memory contents of ROM 35 or OSDROM 36 by CPU 31 is carried out in a generally similar manner, only the operation for rewriting program data written in ROM 35 to modify the CPU program is now described. CPU 31 reads an erasing or rewriting program for executing erasing or rewriting operation from BOOT ROM 34, and the contents of the CPU program are rewritten in accordance with the erasing or rewriting program. Specifically, CPU 31 applies voltages for erasing or rewriting operation, in succession, to memory cells of ROM 35 using sequencer 33 to erase or rewrite the memory contents of ROM 35.
In this case, since CPU 31, sequencer 33 and ROM 35 are connected with one another via signal line 32, CPU 31 can not set in OSD circuit 37 the address data in OSDROM 36 and display positions on a display of an external display device (not shown) of image display data relating to images to be displayed on the external display device until the rewriting operation of memory contents of ROM 35 by CPU 31 is completed. Additionally, OSD circuit 37 can not output or read address signals of the image display data in OSDROM 36 based on the setting by CPU 31 via signal line 32. Therefore, OSDROM 36 and OSD circuit 37 must be in a wait state until the rewrite operation of memory contents of ROM 35 by CPU 31 is completed.
On the other hand, when OSDROM 36 and OSD circuit 37 perform the image display operation as mentioned above, the rewriting operation of memory contents of ROM 35 by CPU 31 can not be carried out because output or reading of address signals of the image display data in OSDROM 36 is executed based on the setting by CPU 31 via signal line 32.
Since conventional single-chip microcomputers are constructed as described above, OSDROM 36 and OSD circuit 37 must be in a wait state until the rewriting operation of memory contents of ROM 35 by CPU 31 is finished, so that the image display function can not be operated during that wait state. On the other hand, the rewriting operation of memory contents of ROM 35 by CPU 31 can not be performed during the image display operation by OSDROM 36 and OSD circuit 37.
The present invention was made to solve the above problems, and it is an object of this invention to provide a single-chip microcomputer which can perform the erasing or rewriting operation of memory devices using the CPU separately from the image display operation using the OSD device by selectively disconnecting the OSD device from a signal line which connects the OSD device with the CPU.
Another object of the present invention is to provide a method of modifying memory contents of memory devices of a single-ship microcomputer which can perform the erasing or rewriting operation of the memory devices using the CPU separately from the image display operation using the OSD device.
A single-chip microcomputer according to the present invention includes a CPU for executing commands included in a CPU program, a CPU-side memory device whose memory contents are electrically erasable or rewritable and which stores a CPU program to be executed by the CPU, an OSD device which produces and outputs display signals relating to image information to be displayed on an external display device based on commands from the CPU to bring the external display device to display the image information, an OSD-side memory device whose memory contents are electrically erasable or rewritable and which stores image display data to be used when the OSD device produces display signals, a CPU-side signal line which connects each of the CPU-side memory device, OSD device, and OSD-side memory device to the CPU and propagates signals between the CPU and these devices, an OSD-side signal line which is connected to the OSD-side memory device and OSD device and propagates image display data selected based on commands from the CPU and signals relating to their address data in the OSD-side memory device, and switching means for disconnecting the OSD device and OSD-side memory device from the CPU-side signal line when the CPU erases or rewrites memory contents of the CPU-side memory device via the CPU-side signal line.
Another single-chip microcomputer according to the present invention includes a plurality of OSD-side memory devices and a plurality of OSD-side signal lines for connecting each OSD-side memory device with the OSD device, and the switching means switches each OSD-side memory device connected with the CPU selectively or properly so that the OSD device can use image display data stored in one of the plurality of OSD-side memory devices while the CPU can erase or rewrite image display data of the other OSD-side memory devices.
In a method of modifying memory contents of memory devices of a single-chip microcomputer according to the present invention, the single-chip microcomputer includes a CPU for executing commands included in a CPU program, a CPU-side memory device whose memory contents are electrically erasable or rewritable and which stores a CPU program to be executed by the CPU, an OSD device which produces and outputs display signals relating to image information to be displayed on an external display device based on commands from the CPU to bring the external display device to display the image information, an OSD-side memory device whose memory contents are electrically erasable or rewritable and which stores image display data to be used when the OSD device produces a display signal, a CPU-side signal line which connects each of the CPU-side memory device, OSD device, and OSD-side memory device to the CPU and propagates signals between the CPU and these devices, and an OSD-side signal line which is connected to the OSD-side memory device and OSD device and propagates image display data selected based on commands from the CPU and signals relating to their address data stored in the OSD-side memory device, and the method comprises the step of disconnecting the OSD device and OSD-side memory device from the CPU-side signal line when the CPU erases and rewrites memory contents of the CPU-side memory device via the CPU-side signal line
In another method of modifying memory contents of memory devices of a single-chip microcomputer according to the present invention, the single-chip microcomputer includes a CPU for executing commands included in a CPU program, a CPU-side memory device whose memory contents are electrically erasable or rewritable and which stores a CPU program to be executed by the CPU, an OSD device which produces and outputs display signals relating to image information to be displayed on an external display device based on commands from the CPU to bring the external display device to display the image information, a plurality of OSD-side memory devices whose memory contents are electrically erasable or rewritable and which store image display data to be used when the OSD device produces display signals, a CPU-side signal line which connects each of the CPU-side memory device, OSD device, and OSD-side memory devices to the CPU and propagates signals between the CPU and these devices, and a plurality of OSD-side signal lines which are connected to each of the OSD-side memory devices and OSD device and propagate image display data selected based on commands from the CPU and signals relating to their address data stored in the OSD-side memory devices, and the method comprises the step of disconnecting the OSD device and each OSD-side memory device which stores image display data to be used by the OSD device from the CPU-side signal line when the CPU performs erasing or rewriting operation of memory contents of the CPU-side memory devices via the CPU-side signal line, and switching each OSD-side memory device connected with the CPU selectively or properly so that the OSD device can use image display data stored in one of the plurality of OSD-side memory devices while the CPU can erase or rewrite image display data of the other OSD-side memory devices.